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third_party
skia
include
private
base
SkFeatures.h
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/*
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* Copyright 2022 Google LLC
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*
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef SkFeatures_DEFINED
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#define SkFeatures_DEFINED
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#if !defined(SK_BUILD_FOR_ANDROID) && !defined(SK_BUILD_FOR_IOS) && !defined(SK_BUILD_FOR_WIN) && \
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!defined(SK_BUILD_FOR_UNIX) && !defined(SK_BUILD_FOR_MAC)
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#ifdef __APPLE__
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#include <TargetConditionals.h>
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#endif
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#if defined(_WIN32) || defined(__SYMBIAN32__)
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#define SK_BUILD_FOR_WIN
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#elif defined(ANDROID) || defined(__ANDROID__)
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#define SK_BUILD_FOR_ANDROID
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#elif defined(linux) || defined(__linux) || defined(__FreeBSD__) || \
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defined(__OpenBSD__) || defined(__sun) || defined(__NetBSD__) || \
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defined(__DragonFly__) || defined(__Fuchsia__) || \
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defined(__GLIBC__) || defined(__GNU__) || defined(__unix__)
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#define SK_BUILD_FOR_UNIX
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#elif TARGET_OS_IPHONE || TARGET_IPHONE_SIMULATOR
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#define SK_BUILD_FOR_IOS
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#else
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#define SK_BUILD_FOR_MAC
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#endif
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#endif
// end SK_BUILD_FOR_*
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#if defined(SK_BUILD_FOR_WIN) && !defined(__clang__)
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#if !defined(SK_RESTRICT)
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#define SK_RESTRICT __restrict
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#endif
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#endif
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#if !defined(SK_RESTRICT)
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#define SK_RESTRICT __restrict__
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#endif
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#if !defined(SK_CPU_BENDIAN) && !defined(SK_CPU_LENDIAN)
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#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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#define SK_CPU_BENDIAN
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#elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
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#define SK_CPU_LENDIAN
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#elif defined(__sparc) || defined(__sparc__) || \
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defined(_POWER) || defined(__powerpc__) || \
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defined(__ppc__) || defined(__hppa) || \
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defined(__PPC__) || defined(__PPC64__) || \
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defined(_MIPSEB) || defined(__ARMEB__) || \
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defined(__s390__) || \
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(defined(__sh__) && defined(__BIG_ENDIAN__)) || \
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(defined(__ia64) && defined(__BIG_ENDIAN__))
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#define SK_CPU_BENDIAN
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#else
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#define SK_CPU_LENDIAN
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#endif
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#endif
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#if defined(__i386) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_X64)
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#define SK_CPU_X86 1
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#endif
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#if defined(__loongarch__) || defined (__loongarch64)
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#define SK_CPU_LOONGARCH 1
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#endif
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/**
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* SK_CPU_SSE_LEVEL
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*
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* If defined, SK_CPU_SSE_LEVEL should be set to the highest supported level.
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* On non-intel CPU this should be undefined.
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*/
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#define SK_CPU_SSE_LEVEL_SSE1 10
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#define SK_CPU_SSE_LEVEL_SSE2 20
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#define SK_CPU_SSE_LEVEL_SSE3 30
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#define SK_CPU_SSE_LEVEL_SSSE3 31
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#define SK_CPU_SSE_LEVEL_SSE41 41
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#define SK_CPU_SSE_LEVEL_SSE42 42
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#define SK_CPU_SSE_LEVEL_AVX 51
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#define SK_CPU_SSE_LEVEL_AVX2 52
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#define SK_CPU_SSE_LEVEL_SKX 60
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/**
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* SK_CPU_LSX_LEVEL
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*
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* If defined, SK_CPU_LSX_LEVEL should be set to the highest supported level.
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* On non-loongarch CPU this should be undefined.
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*/
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#define SK_CPU_LSX_LEVEL_LSX 70
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#define SK_CPU_LSX_LEVEL_LASX 80
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// TODO(brianosman,kjlubick) clean up these checks
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// Are we in GCC/Clang?
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#ifndef SK_CPU_SSE_LEVEL
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// These checks must be done in descending order to ensure we set the highest
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// available SSE level.
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#if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \
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defined(__AVX512BW__) && defined(__AVX512VL__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX
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#elif defined(__AVX2__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2
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#elif defined(__AVX__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX
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#elif defined(__SSE4_2__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE42
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#elif defined(__SSE4_1__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE41
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#elif defined(__SSSE3__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSSE3
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#elif defined(__SSE3__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE3
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#elif defined(__SSE2__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2
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#endif
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#endif
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#ifndef SK_CPU_LSX_LEVEL
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#if defined(__loongarch_asx)
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#define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LASX
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#elif defined(__loongarch_sx)
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#define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LSX
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#endif
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#endif
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// Are we in VisualStudio?
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#ifndef SK_CPU_SSE_LEVEL
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// These checks must be done in descending order to ensure we set the highest
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// available SSE level. 64-bit intel guarantees at least SSE2 support.
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#if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \
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defined(__AVX512BW__) && defined(__AVX512VL__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX
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#elif defined(__AVX2__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2
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#elif defined(__AVX__)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX
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#elif defined(_M_X64) || defined(_M_AMD64)
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2
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#elif defined(_M_IX86_FP)
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#if _M_IX86_FP >= 2
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2
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#elif _M_IX86_FP == 1
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#define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE1
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#endif
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#endif
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#endif
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// ARM defines
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#if defined(__arm__) && (!defined(__APPLE__) || !TARGET_IPHONE_SIMULATOR)
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#define SK_CPU_ARM32
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#elif defined(__aarch64__)
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#define SK_CPU_ARM64
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#endif
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// All 64-bit ARM chips have NEON. Many 32-bit ARM chips do too.
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#if !defined(SK_ARM_HAS_NEON) && defined(__ARM_NEON)
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#define SK_ARM_HAS_NEON
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#endif
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#endif
// SkFeatures_DEFINED
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