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assembler_x64.h File Reference
#include <functional>
#include "platform/assert.h"
#include "platform/utils.h"
#include "vm/compiler/assembler/assembler_base.h"
#include "vm/constants.h"
#include "vm/constants_x86.h"
#include "vm/hash_map.h"
#include "vm/pointer_tagging.h"

Go to the source code of this file.

Classes

class  dart::compiler::Immediate
 
class  dart::compiler::Operand
 
class  dart::compiler::Address
 
class  dart::compiler::FieldAddress
 
class  dart::compiler::Assembler
 

Namespaces

namespace  dart
 
namespace  dart::compiler
 

Macros

#define OBJ(op)   op##q
 
#define RR(width, name, ...)    void name(Register dst, Register src) { Emit##width(dst, src, __VA_ARGS__); }
 
#define RA(width, name, ...)
 
#define RAB(name, ...)
 
#define AR(width, name, ...)
 
#define ARB(name, ...)
 
#define REGULAR_INSTRUCTION(name, ...)
 
#define DECLARE_CMOV(name, code)
 
#define SIMPLE(name, ...)    void name() { EmitSimple(__VA_ARGS__); }
 
#define XX(width, name, ...)
 
#define XA(width, name, ...)
 
#define AX(width, name, ...)
 
#define DECLARE_XMM(name, code)
 
#define DECLARE_CMPPS(name, code)
 
#define DECLARE_SIMPLE(name, opcode)    void name() { EmitSimple(opcode); }
 
#define DECLARE_ALU(op, c)
 
#define REGULAR_UNARY(name, opcode, modrm)
 

Macro Definition Documentation

◆ AR

#define AR (   width,
  name,
  ... 
)
Value:
void name(const Address& dst, Register src) { \
Emit##width(src, dst, __VA_ARGS__); \
}
const char * name
Definition fuchsia.cc:50
int32_t width

Definition at line 341 of file assembler_x64.h.

342 { \
343 Emit##width(src, dst, __VA_ARGS__); \
344 }

◆ ARB

#define ARB (   name,
  ... 
)
Value:
void name(const Address& dst, ByteRegister src) { \
EmitB(src, dst, __VA_ARGS__); \
}

Definition at line 345 of file assembler_x64.h.

346 { \
347 EmitB(src, dst, __VA_ARGS__); \
348 }

◆ AX

#define AX (   width,
  name,
  ... 
)
Value:
void name(const Address& dst, XmmRegister src) { \
Emit##width(src, dst, __VA_ARGS__); \
}

Definition at line 422 of file assembler_x64.h.

423 { \
424 Emit##width(src, dst, __VA_ARGS__); \
425 }

◆ DECLARE_ALU

#define DECLARE_ALU (   op,
 
)
Value:
void op##w(Register dst, Register src) { EmitW(dst, src, c * 8 + 3); } \
void op##l(Register dst, Register src) { EmitL(dst, src, c * 8 + 3); } \
void op##q(Register dst, Register src) { EmitQ(dst, src, c * 8 + 3); } \
void op##w(Register dst, const Address& src) { EmitW(dst, src, c * 8 + 3); } \
void op##l(Register dst, const Address& src) { EmitL(dst, src, c * 8 + 3); } \
void op##q(Register dst, const Address& src) { EmitQ(dst, src, c * 8 + 3); } \
void op##w(const Address& dst, Register src) { EmitW(src, dst, c * 8 + 1); } \
void op##l(const Address& dst, Register src) { EmitL(src, dst, c * 8 + 1); } \
void op##q(const Address& dst, Register src) { EmitQ(src, dst, c * 8 + 1); } \
void op##l(Register dst, const Immediate& imm) { AluL(c, dst, imm); } \
void op##q(Register dst, const Immediate& imm) { \
AluQ(c, c * 8 + 3, dst, imm); \
} \
void op##b(const Address& dst, const Immediate& imm) { AluB(c, dst, imm); } \
void op##w(const Address& dst, const Immediate& imm) { AluW(c, dst, imm); } \
void op##l(const Address& dst, const Immediate& imm) { AluL(c, dst, imm); } \
void op##q(const Address& dst, const Immediate& imm) { \
AluQ(c, c * 8 + 3, dst, imm); \
}
static bool b
SkScalar w

Definition at line 618 of file assembler_x64.h.

619 { EmitW(dst, src, c * 8 + 3); } \
620 void op##l(Register dst, Register src) { EmitL(dst, src, c * 8 + 3); } \
621 void op##q(Register dst, Register src) { EmitQ(dst, src, c * 8 + 3); } \
622 void op##w(Register dst, const Address& src) { EmitW(dst, src, c * 8 + 3); } \
623 void op##l(Register dst, const Address& src) { EmitL(dst, src, c * 8 + 3); } \
624 void op##q(Register dst, const Address& src) { EmitQ(dst, src, c * 8 + 3); } \
625 void op##w(const Address& dst, Register src) { EmitW(src, dst, c * 8 + 1); } \
626 void op##l(const Address& dst, Register src) { EmitL(src, dst, c * 8 + 1); } \
627 void op##q(const Address& dst, Register src) { EmitQ(src, dst, c * 8 + 1); } \
628 void op##l(Register dst, const Immediate& imm) { AluL(c, dst, imm); } \
629 void op##q(Register dst, const Immediate& imm) { \
630 AluQ(c, c * 8 + 3, dst, imm); \
631 } \
632 void op##b(const Address& dst, const Immediate& imm) { AluB(c, dst, imm); } \
633 void op##w(const Address& dst, const Immediate& imm) { AluW(c, dst, imm); } \
634 void op##l(const Address& dst, const Immediate& imm) { AluL(c, dst, imm); } \
635 void op##q(const Address& dst, const Immediate& imm) { \
636 AluQ(c, c * 8 + 3, dst, imm); \
637 }

◆ DECLARE_CMOV

#define DECLARE_CMOV (   name,
  code 
)
Value:
RR(Q, cmov##name##q, 0x40 + code, 0x0F) \
RR(L, cmov##name##l, 0x40 + code, 0x0F) \
RA(Q, cmov##name##q, 0x40 + code, 0x0F) \
RA(L, cmov##name##l, 0x40 + code, 0x0F)
#define RR(width, name,...)

Definition at line 390 of file assembler_x64.h.

◆ DECLARE_CMPPS

#define DECLARE_CMPPS (   name,
  code 
)
Value:
void cmpps##name(XmmRegister dst, XmmRegister src) { \
EmitL(dst, src, 0xC2, 0x0F); \
AssemblerBuffer::EnsureCapacity ensured(&buffer_); \
EmitUint8(code); \
}

Definition at line 467 of file assembler_x64.h.

468 { \
469 EmitL(dst, src, 0xC2, 0x0F); \
470 AssemblerBuffer::EnsureCapacity ensured(&buffer_); \
471 EmitUint8(code); \
472 }

◆ DECLARE_SIMPLE

#define DECLARE_SIMPLE (   name,
  opcode 
)     void name() { EmitSimple(opcode); }

Definition at line 476 of file assembler_x64.h.

477 { EmitSimple(opcode); }

◆ DECLARE_XMM

#define DECLARE_XMM (   name,
  code 
)
Value:
XX(L, name##ps, 0x50 + code, 0x0F) \
XA(L, name##ps, 0x50 + code, 0x0F) \
AX(L, name##ps, 0x50 + code, 0x0F) \
XX(L, name##pd, 0x50 + code, 0x0F, 0x66) \
XA(L, name##pd, 0x50 + code, 0x0F, 0x66) \
AX(L, name##pd, 0x50 + code, 0x0F, 0x66) \
XX(L, name##sd, 0x50 + code, 0x0F, 0xF2) \
XA(L, name##sd, 0x50 + code, 0x0F, 0xF2) \
AX(L, name##sd, 0x50 + code, 0x0F, 0xF2) \
XX(L, name##ss, 0x50 + code, 0x0F, 0xF3) \
XA(L, name##ss, 0x50 + code, 0x0F, 0xF3) \
AX(L, name##ss, 0x50 + code, 0x0F, 0xF3)
#define XX(width, name,...)

Definition at line 441 of file assembler_x64.h.

◆ OBJ

#define OBJ (   op)    op##q

Definition at line 290 of file assembler_x64.h.

◆ RA

#define RA (   width,
  name,
  ... 
)
Value:
void name(Register dst, const Address& src) { \
Emit##width(dst, src, __VA_ARGS__); \
}

Definition at line 333 of file assembler_x64.h.

334 { \
335 Emit##width(dst, src, __VA_ARGS__); \
336 }

◆ RAB

#define RAB (   name,
  ... 
)
Value:
void name(ByteRegister dst, const Address& src) { \
EmitB(dst, src, __VA_ARGS__); \
}

Definition at line 337 of file assembler_x64.h.

338 { \
339 EmitB(dst, src, __VA_ARGS__); \
340 }

◆ REGULAR_INSTRUCTION

#define REGULAR_INSTRUCTION (   name,
  ... 
)
Value:
RA(W, name##w, __VA_ARGS__) \
RA(L, name##l, __VA_ARGS__) \
RA(Q, name##q, __VA_ARGS__) \
RR(W, name##w, __VA_ARGS__) \
RR(L, name##l, __VA_ARGS__) \
RR(Q, name##q, __VA_ARGS__)
#define W
Definition aaa.cpp:17
#define RA(width, name,...)

Definition at line 349 of file assembler_x64.h.

◆ REGULAR_UNARY

#define REGULAR_UNARY (   name,
  opcode,
  modrm 
)
Value:
void name##q(Register reg) { EmitUnaryQ(reg, opcode, modrm); } \
void name##l(Register reg) { EmitUnaryL(reg, opcode, modrm); } \
void name##q(const Address& address) { EmitUnaryQ(address, opcode, modrm); } \
void name##l(const Address& address) { EmitUnaryL(address, opcode, modrm); }

Definition at line 646 of file assembler_x64.h.

647 { EmitUnaryQ(reg, opcode, modrm); } \
648 void name##l(Register reg) { EmitUnaryL(reg, opcode, modrm); } \
649 void name##q(const Address& address) { EmitUnaryQ(address, opcode, modrm); } \
650 void name##l(const Address& address) { EmitUnaryL(address, opcode, modrm); }

◆ RR

#define RR (   width,
  name,
  ... 
)     void name(Register dst, Register src) { Emit##width(dst, src, __VA_ARGS__); }

Definition at line 331 of file assembler_x64.h.

332 { Emit##width(dst, src, __VA_ARGS__); }

◆ SIMPLE

#define SIMPLE (   name,
  ... 
)     void name() { EmitSimple(__VA_ARGS__); }

Definition at line 401 of file assembler_x64.h.

402 { EmitSimple(__VA_ARGS__); }

◆ XA

#define XA (   width,
  name,
  ... 
)
Value:
void name(XmmRegister dst, const Address& src) { \
Emit##width(dst, src, __VA_ARGS__); \
}

Definition at line 418 of file assembler_x64.h.

419 { \
420 Emit##width(dst, src, __VA_ARGS__); \
421 }

◆ XX

#define XX (   width,
  name,
  ... 
)
Value:
void name(XmmRegister dst, XmmRegister src) { \
Emit##width(dst, src, __VA_ARGS__); \
}

Definition at line 414 of file assembler_x64.h.

415 { \
416 Emit##width(dst, src, __VA_ARGS__); \
417 }