Flutter Engine
The Flutter Engine
Loading...
Searching...
No Matches
instructions_arm.h
Go to the documentation of this file.
1// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2// for details. All rights reserved. Use of this source code is governed by a
3// BSD-style license that can be found in the LICENSE file.
4// Classes that describe assembly patterns as used by inline caches.
5
6#ifndef RUNTIME_VM_INSTRUCTIONS_ARM_H_
7#define RUNTIME_VM_INSTRUCTIONS_ARM_H_
8
9#ifndef RUNTIME_VM_INSTRUCTIONS_H_
10#error Do not include instructions_arm.h directly; use instructions.h instead.
11#endif
12
13#include "vm/allocation.h"
14#include "vm/constants.h"
15#include "vm/native_function.h"
16#include "vm/tagged_pointer.h"
17
18#if !defined(DART_PRECOMPILED_RUNTIME)
20#endif // !defined(DART_PRECOMPILED_RUNTIME)
21
22namespace dart {
23
24class ICData;
25class Code;
26class Object;
27class ObjectPool;
28class UntaggedCode;
29
31 public:
32 // Decodes a load sequence ending at 'end' (the last instruction of the
33 // load sequence is the instruction before the one at end). Returns the
34 // address of the first instruction in the sequence. Returns the register
35 // being loaded and the loaded immediate value in the output parameters
36 // 'reg' and 'value' respectively.
38 Register* reg,
39 intptr_t* value);
40
41 // Encodes a load immediate sequence ending at 'end' (the last instruction of
42 // the load sequence is the instruction before the one at end).
43 //
44 // Supports only a subset of [DecodeLoadWordImmediate], namely:
45 // movw r, #lower16
46 // movt r, #upper16
47 static void EncodeLoadWordImmediate(uword end, Register reg, intptr_t value);
48
49 // Decodes a load sequence ending at 'end' (the last instruction of the
50 // load sequence is the instruction before the one at end). Returns the
51 // address of the first instruction in the sequence. Returns the register
52 // being loaded and the index in the pool being read from in the output
53 // parameters 'reg' and 'index' respectively.
54 // IMPORTANT: When generating code loading values from pool on ARM use
55 // LoadWordFromPool macro instruction instead of emitting direct load.
56 // The macro instruction takes care of pool offsets that can't be
57 // encoded as immediates.
59 Register* reg,
60 intptr_t* index);
61};
62
63class CallPattern : public ValueObject {
64 public:
65 CallPattern(uword pc, const Code& code);
66
67 CodePtr TargetCode() const;
68 void SetTargetCode(const Code& code) const;
69
70 private:
71 const ObjectPool& object_pool_;
72
73 intptr_t target_code_pool_index_;
74
76};
77
78class ICCallPattern : public ValueObject {
79 public:
80 ICCallPattern(uword pc, const Code& code);
81
82 ObjectPtr Data() const;
83 void SetData(const Object& data) const;
84
85 CodePtr TargetCode() const;
86 void SetTargetCode(const Code& code) const;
87
88 private:
89 const ObjectPool& object_pool_;
90
91 intptr_t target_pool_index_;
92 intptr_t data_pool_index_;
93
95};
96
98 public:
99 NativeCallPattern(uword pc, const Code& code);
100
101 CodePtr target() const;
102 void set_target(const Code& target) const;
103
106
107 private:
108 const ObjectPool& object_pool_;
109
110 uword end_;
111 intptr_t native_function_pool_index_;
112 intptr_t target_code_pool_index_;
113
115};
116
117// Instance call that can switch between a direct monomorphic call, an IC call,
118// and a megamorphic call.
119// load guarded cid load ICData load MegamorphicCache
120// load monomorphic target <-> load ICLookup stub -> load MMLookup stub
121// call target.entry call stub.entry call stub.entry
123 public:
124 explicit SwitchableCallPatternBase(const ObjectPool& object_pool);
125
127 void SetData(const Object& data) const;
128
129 protected:
133
134 private:
136};
137
138// See [SwitchableCallBase] for a switchable calls in general.
139//
140// The target slot is always a [Code] object: Either the code of the
141// monomorphic function or a stub code.
143 public:
145
147 void SetTarget(const Code& target) const;
148
149 private:
151};
152
153// See [SwitchableCallBase] for a switchable calls in general.
154//
155// The target slot is always a direct entrypoint address: Either the entry point
156// of the monomorphic function or a stub entry point.
167
169 public:
170 explicit ReturnPattern(uword pc);
171
172 // bx_lr = 1.
173 static constexpr int kLengthInBytes = 1 * Instr::kInstrSize;
174
176
177 bool IsValid() const;
178
179 private:
180 const uword pc_;
181};
182
184 public:
185 // 24 bit signed integer which will get multiplied by 4.
186 static constexpr intptr_t kLowerCallingRange =
187 -(1 << 25) + Instr::kPCReadOffset;
188 static constexpr intptr_t kUpperCallingRange =
190
191 explicit PcRelativeCallPatternBase(uword pc) : pc_(pc) {}
192
193 static constexpr int kLengthInBytes = 1 * Instr::kInstrSize;
194
195 int32_t distance() {
196#if !defined(DART_PRECOMPILED_RUNTIME)
198 *reinterpret_cast<int32_t*>(pc_));
199#else
200 UNREACHABLE();
201 return 0;
202#endif
203 }
204
205 void set_distance(int32_t distance) {
206#if !defined(DART_PRECOMPILED_RUNTIME)
207 int32_t* word = reinterpret_cast<int32_t*>(pc_);
209#else
210 UNREACHABLE();
211#endif
212 }
213
214 protected:
216};
217
219 public:
221
222 bool IsValid() const;
223};
224
226 public:
229
230 bool IsValid() const;
231};
232
233// Instruction pattern for a tail call to a signed 32-bit PC-relative offset
234//
235// The AOT compiler can emit PC-relative calls. If the destination of such a
236// call is not in range for the "bl.<cond> <offset>" instruction, the AOT
237// compiler will emit a trampoline which is in range. That trampoline will
238// then tail-call to the final destination (also via PC-relative offset, but it
239// supports a full signed 32-bit offset).
240//
241// The pattern of the trampoline looks like:
242//
243// movw TMP, #lower16
244// movt TMP, #upper16
245// add PC, PC, TMP lsl #0
246//
248 public:
250 : pattern_start_(pattern_start) {
251 USE(pattern_start_);
252 }
253
254 static constexpr int kLengthInBytes = 3 * Instr::kInstrSize;
255
257
258 int32_t distance();
259 void set_distance(int32_t distance);
260 bool IsValid() const;
261
262 private:
263 // This offset must be applied to account for the fact that
264 // a) the actual "branch" is only in the 3rd instruction
265 // b) when reading the PC it reports current instruction + 8
266 static constexpr intptr_t kDistanceOffset = -4 * Instr::kInstrSize;
267
268 // add PC, PC, TMP lsl #0
269 static constexpr uint32_t kAddPcEncoding =
270 (ADD << kOpcodeShift) | (AL << kConditionShift) | (PC << kRnShift) |
271 (PC << kRdShift) | (TMP << kRmShift);
272
273 uword pattern_start_;
274};
275
276} // namespace dart
277
278#endif // RUNTIME_VM_INSTRUCTIONS_ARM_H_
#define UNREACHABLE()
Definition assert.h:248
void SetTarget(const Code &target) const
CallPattern(uword pc, const Code &code)
void SetTargetCode(const Code &code) const
CodePtr TargetCode() const
void SetData(const Object &data) const
ObjectPtr Data() const
CodePtr TargetCode() const
void SetTargetCode(const Code &code) const
ICCallPattern(uword pc, const Code &code)
static uword DecodeLoadWordFromPool(uword end, Register *reg, intptr_t *index)
static void EncodeLoadWordImmediate(uword end, Register reg, intptr_t value)
static uword DecodeLoadWordImmediate(uword end, Register *reg, intptr_t *value)
NativeCallPattern(uword pc, const Code &code)
NativeFunction native_function() const
void set_native_function(NativeFunction target) const
void set_target(const Code &target) const
CodePtr target() const
static constexpr intptr_t kLowerCallingRange
static constexpr intptr_t kUpperCallingRange
static constexpr int kLengthInBytes
void set_distance(int32_t distance)
void set_distance(int32_t distance)
PcRelativeTrampolineJumpPattern(uword pattern_start)
bool IsValid() const
static constexpr int kLengthInBytes
int pattern_length_in_bytes() const
ReturnPattern(uword pc)
void SetData(const Object &data) const
SwitchableCallPatternBase(const ObjectPool &object_pool)
void SetTarget(const Code &target) const
SwitchableCallPattern(uword pc, const Code &code)
static int32_t DecodeBranchOffset(int32_t inst)
static int32_t EncodeBranchOffset(int32_t offset, int32_t inst)
glong glong end
uint32_t * target
uintptr_t uword
Definition globals.h:501
intptr_t word
Definition globals.h:500
static void USE(T &&)
Definition globals.h:618
const Register TMP
@ kConditionShift
@ kOpcodeShift
static int8_t data[kExtLength]
void(* NativeFunction)(NativeArguments *arguments)
#define DISALLOW_COPY_AND_ASSIGN(TypeName)
Definition globals.h:581