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cpu_riscv.cc
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1// Copyright (c) 2021, the Dart project authors. Please see the AUTHORS file
2// for details. All rights reserved. Use of this source code is governed by a
3// BSD-style license that can be found in the LICENSE file.
4
5#include "vm/globals.h"
6#if defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
7
8#include "vm/cpu.h"
9#include "vm/cpu_riscv.h"
10
11#include "vm/cpuinfo.h"
12
13#if !defined(USING_SIMULATOR)
14#if !defined(DART_HOST_OS_FUCHSIA)
15#include <sys/syscall.h>
16#else
17#include <zircon/syscalls.h>
18#endif
19#include <unistd.h>
20#endif
21
22#if defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS)
23#include <libkern/OSCacheControl.h>
24#endif
25
26namespace dart {
27
28void CPU::FlushICache(uword start, uword size) {
29#if defined(DART_PRECOMPILED_RUNTIME)
31#elif !defined(USING_SIMULATOR)
32 // Nothing to do. Flushing no instructions.
33 if (size == 0) {
34 return;
35 }
36
37#if defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS)
38 sys_icache_invalidate(reinterpret_cast<void*>(start), size);
39#elif defined(DART_HOST_OS_ANDROID) || defined(DART_HOST_OS_LINUX)
40 char* beg = reinterpret_cast<char*>(start);
41 char* end = reinterpret_cast<char*>(start + size);
42 __builtin___clear_cache(beg, end);
43#elif defined(DART_HOST_OS_FUCHSIA)
44 zx_status_t result = zx_cache_flush(reinterpret_cast<const void*>(start),
45 size, ZX_CACHE_FLUSH_INSN);
46 ASSERT(result == ZX_OK);
47#else
48#error FlushICache not implemented for this OS
49#endif
50
51#endif
52}
53
54const char* CPU::Id() {
55 return
56#if defined(USING_SIMULATOR)
57 "sim"
58#endif // !defined(USING_SIMULATOR)
59#if defined(TARGET_ARCH_RISCV32)
60 "riscv32";
61#elif defined(TARGET_ARCH_RISCV64)
62 "riscv64";
63#else
64#error What XLEN?
65#endif
66}
67
68const char* HostCPUFeatures::hardware_ = nullptr;
69#if defined(DEBUG)
70bool HostCPUFeatures::initialized_ = false;
71#endif
72
73#if !defined(USING_SIMULATOR)
76 hardware_ = CpuInfo::GetCpuModel();
77#if defined(DEBUG)
78 initialized_ = true;
79#endif
80}
81
83 DEBUG_ASSERT(initialized_);
84#if defined(DEBUG)
85 initialized_ = false;
86#endif
87 ASSERT(hardware_ != nullptr);
88 free(const_cast<char*>(hardware_));
89 hardware_ = nullptr;
91}
92
93#else // !defined(USING_SIMULATOR)
94
97 hardware_ = CpuInfo::GetCpuModel();
98#if defined(DEBUG)
99 initialized_ = true;
100#endif
101}
102
104 DEBUG_ASSERT(initialized_);
105#if defined(DEBUG)
106 initialized_ = false;
107#endif
108 ASSERT(hardware_ != nullptr);
109 free(const_cast<char*>(hardware_));
110 hardware_ = nullptr;
112}
113#endif // !defined(USING_SIMULATOR)
114
115} // namespace dart
116
117#endif // defined TARGET_ARCH_RISCV
#define UNREACHABLE()
Definition: assert.h:248
#define DEBUG_ASSERT(cond)
Definition: assert.h:321
static const char * Id()
static void FlushICache(uword start, uword size)
static void Init()
static const char * GetCpuModel()
Definition: cpuinfo.h:59
static void Cleanup()
static void Init()
static void Cleanup()
#define ASSERT(E)
glong glong end
GAsyncResult * result
Definition: dart_vm.cc:33
uintptr_t uword
Definition: globals.h:501
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Definition: switches.h:259