105 {
106#if defined(TARGET_ARCH_ARM64) && \
107 (defined(DART_TARGET_OS_MACOS_IOS) || defined(DART_TARGET_OS_MACOS))
108 if (is_first_vararg) {
109
110 BlockAllFpuRegisters();
112 }
113#endif
114#if defined(TARGET_ARCH_RISCV64) || defined(TARGET_ARCH_RISCV32)
115 if (is_first_vararg) {
116
117 BlockAllFpuRegisters();
118 }
119#endif
120 const auto&
result = AllocateArgument(payload_type, is_vararg);
121#if defined(TARGET_ARCH_X64) && defined(DART_TARGET_OS_WINDOWS)
122 if (has_varargs_) {
123 if (
result.IsRegisters()) {
124
126 }
else if (
result.IsFpuRegisters()) {
127
129 const auto& fpu_reg_location =
result.AsFpuRegisters();
131 ASSERT(fpu_reg_location.fpu_reg_kind() == kind);
132 FpuRegister fpu_register = fpu_reg_location.fpu_reg();
133 const intptr_t reg_index = fpu_register;
134 ASSERT(cpu_regs_used == reg_index + 1);
138 const auto& cpu_reg_location = *new (zone_) NativeRegistersLocation(
139 zone_, payload_type, container_type, cpu_register);
140 return *new (zone_)
141 BothNativeLocations(fpu_reg_location, cpu_reg_location);
142 }
143 }
144#endif
146 }
static const Register ArgumentRegisters[]
static constexpr bool kArgumentIntRegXorFpuReg
static constexpr intptr_t kNumArgRegs
static const NativeType & ConvertFloatToInt(Zone *zone, const NativeType &type)