15#if !defined(FFI_UNIT_TESTS)
66 ASSERT(index == 0 || index == 1);
105#if !defined(FFI_UNIT_TESTS)
122 const intptr_t size_slots = size / compiler::target::kWordSize;
123 switch (size_slots) {
146 intptr_t index)
const {
156 intptr_t index)
const {
163 base_register_, offset_in_bytes_ + size / num_parts * index);
165 const intptr_t size_rounded_up =
167 ASSERT(size_rounded_up / compiler::target::kWordSize == num_parts);
175 base_register_, offset_in_bytes_ + compiler::target::kWordSize * index);
181 for (
int i = 0; i < locations_.
length(); i++) {
197#if defined(TARGET_ARCH_ARM)
203 switch (fpu_loc.fpu_reg_kind()) {
207 return *
new (zone) NativeFpuRegistersLocation(
208 payload_type_, container_type_,
QRegisterOf(fpu_loc.fpu_d_reg()));
211 return *
new (zone) NativeFpuRegistersLocation(
212 payload_type_, container_type_,
QRegisterOf(fpu_loc.fpu_s_reg()));
224 if (other_regs.num_regs() !=
num_regs()) {
227 for (intptr_t i = 0; i <
num_regs(); i++) {
228 if (other_regs.reg_at(i) !=
reg_at(i)) {
245 return other_fpu_reg.fpu_reg_ == fpu_reg_;
252 const auto& other_stack = other.
AsStack();
253 if (other_stack.base_register_ != base_register_) {
256 return other_stack.offset_in_bytes_ == offset_in_bytes_;
264 if (!other_pointer.pointer_location_.Equals(pointer_location_)) {
270#if !defined(FFI_UNIT_TESTS)
297 for (intptr_t i = 0; i <
num_regs(); i++) {
313#if defined(TARGET_ARCH_ARM)
315 f->Printf(
"%s", RegisterNames::FpuDRegisterName(fpu_d_reg()));
318 f->Printf(
"%s", RegisterNames::FpuSRegisterName(fpu_s_reg()));
329 if (base_register_ !=
SPREG) {
333 f->Printf(
"S+%" Pd, offset_in_bytes_);
341 return textBuffer.
buffer();
357 for (intptr_t i = 0; i < locations_.
length(); i++) {
358 if (i != 0) f->Printf(
", ");
359 locations_[i]->PrintTo(f);
373#if !defined(FFI_UNIT_TESTS)
391 switch (size_in_bytes) {
402#if defined(TARGET_ARCH_ARM)
403DRegister NativeFpuRegistersLocation::fpu_as_d_reg()
const {
404 switch (fpu_reg_kind_) {
415SRegister NativeFpuRegistersLocation::fpu_as_s_reg()
const {
416 switch (fpu_reg_kind_) {
427bool NativeFpuRegistersLocation::IsLowestBits()
const {
432 return fpu_d_reg() % 2 == 0;
435 return fpu_s_reg() % 4 == 0;
const T & At(intptr_t index) const
static Location StackSlot(intptr_t stack_index, Register base)
static Location Pair(Location first, Location second)
static Location DoubleStackSlot(intptr_t stack_index, Register base)
intptr_t stack_index() const
Register base_reg() const
static Location RegisterLocation(Register reg)
PairLocation * AsPairLocation() const
bool IsPairLocation() const
FpuRegister fpu_reg() const
Location At(intptr_t i) const
static const char * FpuRegisterName(FpuRegister reg)
static const char * RegisterAbiName(Register reg)
static Thread * Current()
static constexpr T Maximum(T x, T y)
static constexpr T RoundUp(T x, uintptr_t alignment, uintptr_t offset=0)
virtual void PrintTo(BaseTextBuffer *f) const
virtual void PrintTo(BaseTextBuffer *f) const
virtual intptr_t StackTopInBytes() const
virtual bool Equals(const NativeLocation &other) const
virtual void PrintTo(BaseTextBuffer *f) const
FpuRegisterKind fpu_reg_kind() const
FpuRegister fpu_reg() const
virtual bool IsMultiple() const
virtual bool IsFpuRegisters() const
virtual bool IsPointerToMemory() const
virtual bool IsBoth() const
NativeLocation & WidenTo8Bytes(Zone *zone) const
const MultipleNativeLocations & AsMultiple() const
const NativeType & container_type() const
virtual bool IsStack() const
virtual void PrintTo(BaseTextBuffer *f) const
const NativeRegistersLocation & AsRegisters() const
static bool LocationCanBeExpressed(Location loc, Representation rep)
const PointerToMemoryLocation & AsPointerToMemory() const
static NativeLocation & FromLocation(Zone *zone, Location loc, Representation rep)
const char * ToCString() const
const NativeStackLocation & AsStack() const
virtual NativeLocation & WithOtherNativeType(Zone *zone, const NativeType &new_payload_type, const NativeType &new_container_type) const =0
NativeLocation & WidenTo4Bytes(Zone *zone) const
virtual bool IsRegisters() const
static NativeLocation & FromPairLocation(Zone *zone, Location loc, Representation rep, intptr_t index)
const BothNativeLocations & AsBoth() const
const NativeFpuRegistersLocation & AsFpuRegisters() const
const NativeType & payload_type() const
virtual Representation AsRepresentation() const
virtual NativePrimitiveType & Split(Zone *zone, intptr_t part) const
virtual bool Equals(const NativeLocation &other) const
intptr_t num_regs() const
virtual bool IsExpressibleAsLocation() const
virtual NativeRegistersLocation & Split(Zone *zone, intptr_t num_parts, intptr_t index) const
virtual Location AsLocation() const
Register reg_at(intptr_t index) const
virtual void PrintTo(BaseTextBuffer *f) const
virtual Location AsLocation() const
virtual bool IsExpressibleAsLocation() const
Register base_register() const
virtual NativeStackLocation & Split(Zone *zone, intptr_t num_parts, intptr_t index) const
virtual void PrintTo(BaseTextBuffer *f) const
intptr_t offset_in_bytes() const
virtual bool Equals(const NativeLocation &other) const
virtual void PrintTo(BaseTextBuffer *f, bool multi_line=false, bool verbose=true) const
virtual intptr_t SizeInBytes() const =0
static NativePrimitiveType & FromRepresentation(Zone *zone, Representation rep)
virtual NativeType & Split(Zone *zone, intptr_t index) const
virtual bool Equals(const NativeType &other) const
const NativeLocation & pointer_location() const
virtual void PrintTo(BaseTextBuffer *f) const
virtual bool Equals(const NativeLocation &other) const
const NativeLocation & pointer_return_location() const
intptr_t SizeFromFpuRegisterKind(enum FpuRegisterKind kind)
static void PrintRepresentations(BaseTextBuffer *f, const NativeLocation &loc)
compiler::Address NativeLocationToStackSlotAddress(const NativeStackLocation &loc)
enum FpuRegisterKind FpuRegisterKindFromSize(intptr_t size_in_bytes)
static DRegister EvenDRegisterOf(QRegister q)
static DRegister DRegisterOf(SRegister s)
static QRegister QRegisterOf(DRegister d)
static SRegister EvenSRegisterOf(DRegister d)
#define UNREACHABLE_THIS()